Alibaba unveils most powerful RISC-V processor to date

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Alibaba Unveils Most Powerful RISC-V Processor To-Date

Date:July 25, 2019

T-Head (also known in Chinese as Pingtouge), the chip technology unit in Alibaba DAMO Academy, today unveiled its new product, a high-performance 64-bit CPU IP CoreXuanTie910 (or XT 910), the most powerful RISC-V processor to-date.

Based on RISC-V, the open-source instruction set architecture (ISA), XT910 can achieve 7.1 Coremark/MHz per core, 40% above the top performance of existing RISC-V processors; Its working frequency reaches 2.5GHz at 12nm process; Furthermore, multi-cluster and multi-core architecture are both implemented in XT910 to expand the core capacity, and 16 cores can now be integrated into a single chip. This is also a product debut for T-Head since the unit was launched in September 2018.

“The breakthrough is more than a mere performance enhancement of RISC-V processors. It means more IoT areas that require high-performance computing such as 5G, AI, networking, gateway, self-driving automobile, and edge server can now be powered by this latest RISC-V processor, which was previously used for simple embedded devices like smart-home appliances,” said Jianyi Meng, Senior Director at Alibaba Group who is leading the development of XT910. “We are excited about this new development and the exciting future that it unfolds for the RISC-V community.”

“We are truly fascinated by the important milestone that Alibaba’s RISC-V processor has created,” said Calista Redmond, CEO of the RISC-V Foundation. “We believe many chip developers can benefit from this technology breakthrough, which also helps accelerate the growth of the RISC-V community now that more IoT areas can be explored. I believe the RISC-V community, especially the community in Asia, will be on a much faster growth trajectory in the years ahead.”

As an effort to contribute to the growth of the RISC-V community, T-Head also announced making the simulation and emulation code available for the public on Github by September this year, along with related development tools and documents. This is also a move to celebrate the first anniversary of the launch of T-Head.

“By sharing the simulation and emulation code, we hope to provide global developers with access to the high-performance processor so they can leverage the technology to develop prototypes for their own chips. As a result, more innovation in IoT and AI fields can be created. That is aligned with Alibaba DAMO Academy’s mission of making technology more inclusive, open and accessible,” added Meng.

As another move to support the RISC-V community, Alibaba Group also announced joining CHIPS Alliance, the leading consortium advancing common, open hardware for interfaces, processors and systems today. Alibaba is the first member with Asia-based headquarters in the Alliance. The Alliance project hosts and curates high-quality open-source Register Transfer Level (RTL) code relevant to the design of open-source CPUs, RISC-V-based SoCs, and complex peripherals for FPGAs and custom silicon.

Please refer to the appendix below for more information of XT910. For more information of Alibaba DAMO Academy, please refer to the site: https://damo.alibaba.com.

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Appendix: Overview of XT910

XT910 is a 64-bit high-performance processor based on the RISC-V ISA with version RV64GCV (RV64IMACFDV).

XT910, a superscalar core with 3 decoders, implements a 12 stage out-of-order pipeline. A maximum of 8 instructions can be fed into the execution unit each cycle including 1 load and 1 store instructions. Multi-cluster technology is applied to XT910 to increase the core capacity, which supports 16 cores with each cluster comprising 4 cores.

Another major feature of XT910 is the introduction of 50 extra instructions extended to the RISC-V base ISA to enhance the processing capability in arithmetic, memory access, and cache/TLB maintenance."